英飞凌Aurix tc3xx 多核链接文件 lsl --（上篇）
英飞凌多核单片机lsl文件
本链接文件 为免费自带 实例lsl, 如有侵权，请告知/
/*分上下两部分，下一篇介绍 /sections 布局设计，包括数据存放位置，程序存放位置等信息/ */
/定义 core0 的 上下文空间，用户栈空间，中断空间/
#define LCF_CSA0_SIZE 8k
#define LCF_USTACK0_SIZE 2k
#define LCF_ISTACK0_SIZE 1k
/定义 core1 的 上下文空间，用户栈空间，中断空间/
#define LCF_CSA1_SIZE 8k
#define LCF_USTACK1_SIZE 2k
#define LCF_ISTACK1_SIZE 1k
/定义 core2 的 上下文空间，用户栈空间，中断空间/
#define LCF_CSA2_SIZE 8k
#define LCF_USTACK2_SIZE 2k
#define LCF_ISTACK2_SIZE 1k
/定义 core3 的 上下文空间，用户栈空间，中断空间/
#define LCF_CSA3_SIZE 8k
#define LCF_USTACK3_SIZE 2k
#define LCF_ISTACK3_SIZE 1k
/定义 core4 的 上下文空间，用户栈空间，中断空间/
#define LCF_CSA4_SIZE 8k
#define LCF_USTACK4_SIZE 2k
#define LCF_ISTACK4_SIZE 1k
/定义 core5 的 上下文空间，用户栈空间，中断空间/
#define LCF_CSA5_SIZE 8k
#define LCF_USTACK5_SIZE 2k
#define LCF_ISTACK5_SIZE 1k
/定义堆空间/
#define LCF_HEAP_SIZE 4k
/定义CPU cores/
#define LCF_CPU0 0
#define LCF_CPU1 1
#define LCF_CPU2 2
#define LCF_CPU3 3
#define LCF_CPU4 4
#define LCF_CPU5 5
/Un comment one of the below statements to enable CpuX DMI RAM to hold global variables/
#define LCF_DEFAULT_HOST LCF_CPU0
/#define LCF_DEFAULT_HOST LCF_CPU1/
/#define LCF_DEFAULT_HOST LCF_CPU2/
/#define LCF_DEFAULT_HOST LCF_CPU3/
/#define LCF_DEFAULT_HOST LCF_CPU4/
/#define LCF_DEFAULT_HOST LCF_CPU5/
/* Data Scratch Memory core5 数据ram 大小和 起始 位置*/
#define LCF_DSPR5_START 0x10000000
#define LCF_DSPR5_SIZE 96k
/* Data Scratch Memory core4 数据ram 大小和 起始 位置*/
#define LCF_DSPR4_START 0x30000000
#define LCF_DSPR4_SIZE 96k
/* Data Scratch Memory core3 数据ram 大小和 起始 位置*/
#define LCF_DSPR3_START 0x40000000
#define LCF_DSPR3_SIZE 96k
/* Data Scratch Memory core2 数据ram 大小和 起始 位置*/
#define LCF_DSPR2_START 0x50000000
#define LCF_DSPR2_SIZE 96k
/* Data Scratch Memory core1 数据ram 大小和 起始 位置*/
#define LCF_DSPR1_START 0x60000000
#define LCF_DSPR1_SIZE 240k
/* Data Scratch Memory core0 数据ram 大小和 起始 位置*/
#define LCF_DSPR0_START 0x70000000
#define LCF_DSPR0_SIZE 240k
/core5 上下文偏移地址/
/96 - 1 - 8 = 87 = 87 * 1024 = 0x00015C00/
#define LCF_CSA5_OFFSET (LCF_DSPR5_SIZE - 1k - LCF_CSA5_SIZE)
/core5 中断栈区偏移地址/
/871024 - 256 - 11024 = 0x00015700/
#define LCF_ISTACK5_OFFSET (LCF_CSA5_OFFSET - 256 - LCF_ISTACK5_SIZE)
/core5 用户栈区偏移地址/
/871024 - 256 - 11024 - 256 - 21024 = 0x00014E00*/
#define LCF_USTACK5_OFFSET (LCF_ISTACK5_OFFSET - 256 - LCF_USTACK5_SIZE)
/同core5 计算/
#define LCF_CSA4_OFFSET (LCF_DSPR4_SIZE - 1k - LCF_CSA4_SIZE)
#define LCF_ISTACK4_OFFSET (LCF_CSA4_OFFSET - 256 - LCF_ISTACK4_SIZE)
#define LCF_USTACK4_OFFSET (LCF_ISTACK4_OFFSET - 256 - LCF_USTACK4_SIZE)
/同core5 计算/
#define LCF_CSA3_OFFSET (LCF_DSPR3_SIZE - 1k - LCF_CSA3_SIZE)
#define LCF_ISTACK3_OFFSET (LCF_CSA3_OFFSET - 256 - LCF_ISTACK3_SIZE)
#define LCF_USTACK3_OFFSET (LCF_ISTACK3_OFFSET - 256 - LCF_USTACK3_SIZE)
/同core5 计算/
#define LCF_CSA2_OFFSET (LCF_DSPR2_SIZE - 1k - LCF_CSA2_SIZE)
#define LCF_ISTACK2_OFFSET (LCF_CSA2_OFFSET - 256 - LCF_ISTACK2_SIZE)
#define LCF_USTACK2_OFFSET (LCF_ISTACK2_OFFSET - 256 - LCF_USTACK2_SIZE)
/同core5 计算/
#define LCF_CSA1_OFFSET (LCF_DSPR1_SIZE - 1k - LCF_CSA1_SIZE)
#define LCF_ISTACK1_OFFSET (LCF_CSA1_OFFSET - 256 - LCF_ISTACK1_SIZE)
#define LCF_USTACK1_OFFSET (LCF_ISTACK1_OFFSET - 256 - LCF_USTACK1_SIZE)
/同core5 计算/
#define LCF_CSA0_OFFSET (LCF_DSPR0_SIZE - 1k - LCF_CSA0_SIZE)
#define LCF_ISTACK0_OFFSET (LCF_CSA0_OFFSET - 256 - LCF_ISTACK0_SIZE)
#define LCF_USTACK0_OFFSET (LCF_ISTACK0_OFFSET - 256 - LCF_USTACK0_SIZE)
/定义堆区偏移地址 e.g.core5 0x00014E00 - 41024 = 0x00013E00*/
#define LCF_HEAP0_OFFSET (LCF_USTACK0_OFFSET - LCF_HEAP_SIZE)
#define LCF_HEAP1_OFFSET (LCF_USTACK1_OFFSET - LCF_HEAP_SIZE)
#define LCF_HEAP2_OFFSET (LCF_USTACK2_OFFSET - LCF_HEAP_SIZE)
#define LCF_HEAP3_OFFSET (LCF_USTACK3_OFFSET - LCF_HEAP_SIZE)
#define LCF_HEAP4_OFFSET (LCF_USTACK4_OFFSET - LCF_HEAP_SIZE)
#define LCF_HEAP5_OFFSET (LCF_USTACK5_OFFSET - LCF_HEAP_SIZE)
/定义各个核中断向量表起始地址，由此可见中断向量表起始地址都在每个core的Program flash空间的倒数8k的位置/
#define LCF_INTVEC0_START 0x802FE000
#define LCF_INTVEC1_START 0x805FE000
#define LCF_INTVEC2_START 0x808FE000
#define LCF_INTVEC3_START 0x80BFE000
#define LCF_INTVEC4_START 0x80EFE000
#define LCF_INTVEC5_START 0x80FFE000
/定义各个核trap(陷阱)向量表的起始位置，由此可见除了core0在pflash隔了100个bytes位起始位置，其他core 都是 pflash的起始位置/
#define LCF_TRAPVEC0_START 0x80000100
#define LCF_TRAPVEC1_START 0x80300000
#define LCF_TRAPVEC2_START 0x80600000
#define LCF_TRAPVEC3_START 0x80900000
#define LCF_TRAPVEC4_START 0x80C00000
#define LCF_TRAPVEC5_START 0x80F00000
/定义各个cores 起始指针位置(允许cache访问)/
#define LCF_STARTPTR_CPU0 0x80000000
#define LCF_STARTPTR_CPU1 0x80300100
#define LCF_STARTPTR_CPU2 0x80600100
#define LCF_STARTPTR_CPU3 0x80900100
#define LCF_STARTPTR_CPU4 0x80C00100
#define LCF_STARTPTR_CPU5 0x80F00100
/定义各个cores 起始指针位置(不允许cache访问)/
#define LCF_STARTPTR_NC_CPU0 0xA0000000
#define LCF_STARTPTR_NC_CPU1 0xA0300100
#define LCF_STARTPTR_NC_CPU2 0xA0600100
#define LCF_STARTPTR_NC_CPU3 0xA0900100
#define LCF_STARTPTR_NC_CPU4 0xA0C00100
#define LCF_STARTPTR_NC_CPU5 0xA0F00100
/中断向量表 和 trap 向量表/
#define INTTAB0 (LCF_INTVEC0_START)
#define INTTAB1 (LCF_INTVEC1_START)
#define INTTAB2 (LCF_INTVEC2_START)
#define INTTAB3 (LCF_INTVEC3_START)
#define INTTAB4 (LCF_INTVEC4_START)
#define INTTAB5 (LCF_INTVEC5_START)
#define TRAPTAB0 (LCF_TRAPVEC0_START)
#define TRAPTAB1 (LCF_TRAPVEC1_START)
#define TRAPTAB2 (LCF_TRAPVEC2_START)
#define TRAPTAB3 (LCF_TRAPVEC3_START)
#define TRAPTAB4 (LCF_TRAPVEC4_START)
#define TRAPTAB5 (LCF_TRAPVEC5_START)
/定义reset位置位core0的起始指针位置(不运行cache访问)/
#define RESET LCF_STARTPTR_NC_CPU0
#include “tc1v1_6_2.lsl”
// Specify a multi-core processor environment (mpe)
/多核环境 芯片 Tc397/
processor mpe
{
derivative = tc39;
}
/各个核架构定义/
derivative tc39
{
core tc0
{
architecture = TC1V1.6.2;
space_id_offset = 100; // add 100 to all space IDs in the architecture definition
copytable_space = vtc:linear; // use the copy table in the virtual core for 'bss' and initialized data sections
}
core tc1 // core 1 TC16E
{
architecture = TC1V1.6.2;
space_id_offset = 200; // add 200 to all space IDs in the architecture definition
copytable_space = vtc:linear; // use the copy table in the virtual core for 'bss' and initialized data sections
}
core tc2 // core 2 TC16P
{
architecture = TC1V1.6.2;
space_id_offset = 300; // add 300 to all space IDs in the architecture definition
copytable_space = vtc:linear; // use the copy table in the virtual core for 'bss' and initialized data sections
}
core tc3 // core 3 TC16P
{
architecture = TC1V1.6.2;
space_id_offset = 400; // add 300 to all space IDs in the architecture definition
copytable_space = vtc:linear; // use the copy table in the virtual core for 'bss' and initialized data sections
}
core tc4 // core 4 TC16P
{
architecture = TC1V1.6.2;
space_id_offset = 500; // add 300 to all space IDs in the architecture definition
copytable_space = vtc:linear; // use the copy table in the virtual core for 'bss' and initialized data sections
}
core tc5 // core 5 TC16P
{
architecture = TC1V1.6.2;
space_id_offset = 600; // add 300 to all space IDs in the architecture definition
copytable_space = vtc:linear; // use the copy table in the virtual core for 'bss' and initialized data sections
}
core vtc
{
architecture = TC1V1.6.2;
import tc0; // add all address spaces of core tc0 to core vtc for linking and locating
import tc1; // tc1
import tc2; // tc2
import tc3; // tc3
import tc4; // tc4
import tc5; // tc5
}
/内部数据bus定义/
bus sri
{
mau = 8; // 最小地址单位
width = 32; // 地址行数
/* map关键字指定此总线如何映射到另一个总线 */
// map shared addresses one-to-one to real cores and virtual cores
/*
dest 参数指定目的地址。这可以是一个总线或另一个地址空间(仅适用于空间到空间的映射)。这个参数是必需的。
src_offset 参数指定源地址的偏移量。与size一起，它指定了映射的地址范围。缺省情况下，源偏移量为0x0000。
size 参数指定被映射的地址数量。这个参数是必需的。
dest_offset 参数指定指定地址范围映射到的目标地址的位置。缺省情况下，目的偏移量为0x0000。
*/
map (dest=bus:tc0:fpi_bus, src_offset=0, dest_offset=0, size=0xc0000000);
map (dest=bus:tc1:fpi_bus, src_offset=0, dest_offset=0, size=0xc0000000);
map (dest=bus:tc2:fpi_bus, src_offset=0, dest_offset=0, size=0xc0000000);
map (dest=bus:tc3:fpi_bus, src_offset=0, dest_offset=0, size=0xc0000000);
map (dest=bus:tc4:fpi_bus, src_offset=0, dest_offset=0, size=0xc0000000);
map (dest=bus:tc5:fpi_bus, src_offset=0, dest_offset=0, size=0xc0000000);
map (dest=bus:vtc:fpi_bus, src_offset=0, dest_offset=0, size=0xc0000000);
}
/数据/
memory dsram5 // Data Scratch Pad Ram
{
mau = 8;
size = 96k;
type = ram;
/*priority:
如果定义内存，可以使用关键字priority和exec_priority在映射上设置定位优先级。
这些优先级的值是相对的，这意味着它们增加了内存的优先级。
内存上的优先级设置适用于通过内存映射可达的所有地址空间区域，
而映射上的优先级设置仅适用于通过映射可达的地址空间区域。
优先级最高的内存映射在定位时优先考虑。
若要仅为非可执行(数据)部分设置优先级，请添加具有所需值的priority关键字，
并将exec_priority设置为0。要仅为可执行(代码)部分设置优先级，
只需将exec_priority关键字设置为所需的值。
*/
map (dest=bus:tc5:fpi_bus, dest_offset=0xd0000000, size=96k, priority=8);
map (dest=bus:sri, dest_offset=0x10000000, size=96k);
}
/程序/
memory psram5 // Program Scratch Pad Ram
{
mau = 8;
size = 64k;
type = ram;
map (dest=bus:tc5:fpi_bus, dest_offset=0xc0000000, size=64k, priority=8);
map (dest=bus:sri, dest_offset=0x10100000, size=64k);
}
memory dsram4 // Data Scratch Pad Ram
{
mau = 8;
size = 96k;
type = ram;
map (dest=bus:tc4:fpi_bus, dest_offset=0xd0000000, size=96k, priority=8);
map (dest=bus:sri, dest_offset=0x30000000, size=96k);
}
memory psram4 // Program Scratch Pad Ram
{
mau = 8;
size = 64k;
type = ram;
map (dest=bus:tc4:fpi_bus, dest_offset=0xc0000000, size=64k, priority=8);
map (dest=bus:sri, dest_offset=0x30100000, size=64k);
}
memory dsram3 // Data Scratch Pad Ram
{
mau = 8;
size = 96k;
type = ram;
map (dest=bus:tc3:fpi_bus, dest_offset=0xd0000000, size=96k, priority=8);
map (dest=bus:sri, dest_offset=0x40000000, size=96k);
}
memory psram3 // Program Scratch Pad Ram
{
mau = 8;
size = 64k;
type = ram;
map (dest=bus:tc3:fpi_bus, dest_offset=0xc0000000, size=64k, priority=8);
map (dest=bus:sri, dest_offset=0x40100000, size=64k);
}
memory dsram2 // Data Scratch Pad Ram
{
mau = 8;
size = 96k;
type = ram;
map (dest=bus:tc2:fpi_bus, dest_offset=0xd0000000, size=96k, priority=8);
map (dest=bus:sri, dest_offset=0x50000000, size=96k);
}
memory psram2 // Program Scratch Pad Ram
{
mau = 8;
size = 64k;
type = ram;
map (dest=bus:tc2:fpi_bus, dest_offset=0xc0000000, size=64k, priority=8);
map (dest=bus:sri, dest_offset=0x50100000, size=64k);
}
memory dsram1 // Data Scratch Pad Ram
{
mau = 8;
size = 240k;
type = ram;
map (dest=bus:tc1:fpi_bus, dest_offset=0xd0000000, size=240k, priority=8);
map (dest=bus:sri, dest_offset=0x60000000, size=240k);
}
memory psram1 // Program Scratch Pad Ram
{
mau = 8;
size = 64k;
type = ram;
map (dest=bus:tc1:fpi_bus, dest_offset=0xc0000000, size=64k, priority=8);
map (dest=bus:sri, dest_offset=0x60100000, size=64k);
}
memory dsram0 // Data Scratch Pad Ram
{
mau = 8;
size = 240k;
type = ram;
map (dest=bus:tc0:fpi_bus, dest_offset=0xd0000000, size=240k, priority=8);
map (dest=bus:sri, dest_offset=0x70000000, size=240k);
}
memory psram0 // Program Scratch Pad Ram
{
mau = 8;
size = 64k;
type = ram;
map (dest=bus:tc0:fpi_bus, dest_offset=0xc0000000, size=64k, priority=8);
map (dest=bus:sri, dest_offset=0x70100000, size=64k);
}
memory pfls0
{
mau = 8;
size = 3M;
type = rom;
map cached (dest=bus:sri, dest_offset=0x80000000, size=3M);
map not_cached (dest=bus:sri, dest_offset=0xa0000000, reserved, size=3M);
}
memory pfls1
{
mau = 8;
size = 3M;
type = rom;
map cached (dest=bus:sri, dest_offset=0x80300000, size=3M);
map not_cached (dest=bus:sri, dest_offset=0xa0300000, reserved, size=3M);
}
memory pfls2
{
mau = 8;
size = 3M;
type = rom;
map cached (dest=bus:sri, dest_offset=0x80600000, size=3M);
map not_cached (dest=bus:sri, dest_offset=0xa0600000, reserved, size=3M);
}
memory pfls3
{
mau = 8;
size = 3M;
type = rom;
map cached (dest=bus:sri, dest_offset=0x80900000, size=3M);
map not_cached (dest=bus:sri, dest_offset=0xa0900000, reserved, size=3M);
}
memory pfls4
{
mau = 8;
size = 3M;
type = rom;
map cached (dest=bus:sri, dest_offset=0x80c00000, size=3M);
map not_cached (dest=bus:sri, dest_offset=0xa0c00000, reserved, size=3M);
}
memory pfls5
{
mau = 8;
size = 1M;
type = rom;
map cached (dest=bus:sri, dest_offset=0x80f00000, size=1M);
map not_cached (dest=bus:sri, dest_offset=0xa0f00000, reserved, size=1M);
}
memory dfls0
{
mau = 8;
size = 1M;
type = reserved nvram;
map (dest=bus:sri, dest_offset=0xaf000000, size=1M );
}
memory ucb
{
mau = 8;
size = 24k;
type = rom;
map (dest=bus:sri, dest_offset=0xaf400000, reserved, size=24k);
}
memory cpu0_dlmu
{
mau = 8;
size = 64k;
type = ram;
map cached (dest=bus:sri, dest_offset=0x90000000, size=64k);
map not_cached (dest=bus:sri, dest_offset=0xb0000000, reserved, size=64k);
}
memory cpu1_dlmu
{
mau = 8;
size = 64k;
type = ram;
map cached (dest=bus:sri, dest_offset=0x90010000, size=64k);
map not_cached (dest=bus:sri, dest_offset=0xb0010000, reserved, size=64k);
}
memory cpu2_dlmu
{
mau = 8;
size = 64k;
type = ram;
map cached (dest=bus:sri, dest_offset=0x90020000, size=64k);
map not_cached (dest=bus:sri, dest_offset=0xb0020000, reserved, size=64k);
}
memory cpu3_dlmu
{
mau = 8;
size = 64k;
type = ram;
map cached (dest=bus:sri, dest_offset=0x90030000, size=64k);
map not_cached (dest=bus:sri, dest_offset=0xb0030000, reserved, size=64k);
}
memory lmuram
{
mau = 8;
size = 768K;
type = ram;
map cached (dest=bus:sri, dest_offset=0x90040000, size=768K);
map not_cached (dest=bus:sri, dest_offset=0xb0040000, reserved, size=768K);
}
memory cpu4_dlmu
{
mau = 8;
size = 64k;
type = ram;
map cached (dest=bus:sri, dest_offset=0x90100000, size=64k);
map not_cached (dest=bus:sri, dest_offset=0xb0100000, reserved, size=64k);
}
memory cpu5_dlmu
{
mau = 8;
size = 64k;
type = ram;
map cached (dest=bus:sri, dest_offset=0x90110000, size=64k);
map not_cached (dest=bus:sri, dest_offset=0xb0110000, reserved, size=64k);
}
memory edmem
{
mau = 8;
size = 4M;
type = ram;
map (dest=bus:sri, dest_offset=0x99000000, size=4M);
map (dest=bus:sri, dest_offset=0xb9000000, reserved, size=4M);
}
/section 设置/
#if (VERSION >= 6003)
section_setup :vtc:linear
{
heap "heap" (min_size = (1k), fixed, align = 8); /* 最小堆区1k, 字节对齐8字节 */
}
#endif
/*
软件运行起始地址标志位
在程序中的入口函数
如
void _START(void)
{
Ifx_Ssw_jumpToFunction(__StartUpSoftware);
}
然后运行到函数Ifx_Ssw_jumpToFunction(__StartUpSoftware) 进行初始化
*/
section_setup :vtc:linear
{
start_address
(
symbol = "_START"
);
}
/*
min_size语句必须存在。
min_size值必须大于等于1。
最多可以指定一个align语句，一个grow语句和一个threads语句。
每个堆栈定义可以有一个或多个entry_points语句用于堆栈评估。symbol_name相对应编译器生成的.CALLS指令中名称
*/
section_setup :vtc:linear
{
stack "ustack_tc0" (min_size = 1k, fixed, align = 8);
stack "istack_tc0" (min_size = 1k, fixed, align = 8);
stack "ustack_tc1" (min_size = 1k, fixed, align = 8);
stack "istack_tc1" (min_size = 1k, fixed, align = 8);
stack "ustack_tc2" (min_size = 1k, fixed, align = 8);
stack "istack_tc2" (min_size = 1k, fixed, align = 8);
stack "ustack_tc3" (min_size = 1k, fixed, align = 8);
stack "istack_tc3" (min_size = 1k, fixed, align = 8);
stack "ustack_tc4" (min_size = 1k, fixed, align = 8);
stack "istack_tc4" (min_size = 1k, fixed, align = 8);
stack "ustack_tc5" (min_size = 1k, fixed, align = 8);
stack "istack_tc5" (min_size = 1k, fixed, align = 8);
}
/*Section setup for the copy table*/
/*
copy_unit是由启动代码移动数据的MAUs大小定义的。
dest语句只在启动代码初始化内存时被另一个没有ROM访问权限的处理器使用。
space_name是指一个已定义的地址空间。
*/
section_setup :vtc:linear
{
copytable
(
align = 4,
dest = linear,
table
{
symbol = "_lc_ub_table_tc0";
space = :tc0:linear, :tc0:abs24, :tc0:abs18, :tc0:csa;
},
table
{
symbol = "_lc_ub_table_tc1";
space = :tc1:linear, :tc1:abs24, :tc1:abs18, :tc1:csa;
},
table
{
symbol = "_lc_ub_table_tc2";
space = :tc2:linear, :tc2:abs24, :tc2:abs18, :tc2:csa;
},
table
{
symbol = "_lc_ub_table_tc3";
space = :tc3:linear, :tc3:abs24, :tc3:abs18, :tc3:csa;
},
table
{
symbol = "_lc_ub_table_tc4";
space = :tc4:linear, :tc4:abs24, :tc4:abs18, :tc4:csa;
},
table
{
symbol = "_lc_ub_table_tc5";
space = :tc5:linear, :tc5:abs24, :tc5:abs18, :tc5:csa;
}
);
}
开放原子开发者工作坊旨在鼓励更多人参与开源活动，与志同道合的开发者们相互交流开发经验、分享开发心得、获取前沿技术趋势。工作坊有多种形式的开发者活动，如meetup、训练营等，主打技术交流，干货满满，真诚地邀请各位开发者共同参与！
更多推荐
0
0- 0
已为社区贡献1条内容
所有评论(0)